DIMM error detection/correction technologies

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DIMM error detection/correction technologies

Memory modules used in servers are inherently susceptible to memory errors. As described earlier, each DRAM chip stores data in columns and rows of capacitors (memory cells) that must be continuously recharged (refreshed) to preserve the data. The operating voltage of the memory device determines the level of the electrical charge. However, if a capacitor’s charge is affected by some external event, the data may become incorrect. Such memory errors can cause applications and operating systems to crash and can result in the permanent loss of business data.

Memory errors are classified by the number of bits that are affected—single-bit or multi-bit—and the cause of error. A 64-bit wide data bus transports 64 bits at a time. These 64 bits constitute an ECC data word. An error in one bit of a data word is a single-bit error. An error in more than one bit of a data word is a multi-bit error.

Depending on the cause, a memory error is referred to as either a hard or soft error. A hard error is caused by a broken or defective piece of hardware, so the device consistently returns incorrect results. For example, a memory cell may be stuck so that it always returns “0” bit, even when a “1” bit is written to it. Hard errors can be caused by DRAM defects, bad solder joints, connector issues, and other physical issues. Soft errors are more prevalent. They occur randomly when an electrical disturbance near a memory cell alters the charge on the capacitor. A soft error does not indicate a problem with a memory device because once the stored data is corrected (for example, by a write to a memory cell), the same error does not recur.

Information porvided by Hewlett-Packard Development Company, L.P.